~raitobezarius/sakaido

Sakaido, the brillant microprocessor

4ecd992 license: add MIT

1 year, 7 months ago

5babf90 initial commit: README

1 year, 7 months ago

#Sakaido: The Brillant Microprocessor

This project (will) use:

  • Haskell for my personal netlist simulator ;
  • Verilog for the HDL ;
  • RISC-V RV32I ^[Though, RV64I is considered.] as a target ISA ;
  • Icarus Verilog for simulation ;
  • Papilio Duo as the FPGA development board ;
  • Nix as a package manager

It is licensed under MIT license.